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Commercial touchscreens can serve as a reader interface for capacitive coupled data transfer using identification tags that are fabricated with thin-film transistor technology and powered by thin-film photovoltaic cells that convert light from the touchscreens.
Thin-film transistors with a high electron mobility and operational stability can be fabricated from solution-processed multilayer channels composed of ultrathin layers of indium oxide, zinc oxide nanoparticles, ozone-treated polystyrene and compact zinc oxide.
A ferroelectric semiconductor field-effect transistor, which uses the two-dimensional ferroelectric semiconductor α-In2Se3 as a channel material, could offer enhanced capabilities compared with conventional ferroelectric field-effect transistors in non-volatile memory applications.
A floating-gate memristive device fabricated in a commercial 180 nm CMOS process can be integrated into a selector-free memristive array and used to demonstrate basic neuromorphic applications.
Using a monolayer molecular crystal as a seeding layer, hafnium oxide dielectrics with an equivalent oxide thickness of only 1 nm can be deposited on graphene, molybdenum disulfide and tungsten diselenide.
A compact ternary content-addressable memory cell, which is based on two ferroelectric field-effect transistors, can provide memory augmented neural networks with improved energy and latency performance compared with traditional approaches based on graphics processing units.
High-voltage amorphous oxide semiconductor thin-film transistors can be integrated on top of a silicon integrated circuit containing 100-nm-node fin field-effect transistors using an in-air solution process.
The absorption profile of photodetectors based on silicon can be extended into the near- and shortwave-infrared regions by taking advantage of optical resonance effects.
Flexible transparent electrodes made from silver nanowires that form grid-like structures due to ionic electrostatic charge repulsion can be used to create flexible single-junction and tandem organic photovoltaic devices with power conversion efficiencies of 13.1% and 16.5%, respectively.
A reservoir computer system based on dynamic tungsten oxide memristors can be used to perform time-series analysis, demonstrating isolated spoken-digit recognition with partial inputs and chaotic system forecasting.
Nanomechanical resonators with frequencies from 340 kHz to 13 GHz can be created using an integrated 10-nm-thick transducer layer of hafnium zirconium oxide.
A technique that combines X-ray ptychography with laminography can provide three-dimensional views of integrated circuits, yielding both images of entire chip volumes and high-resolution images of arbitrarily chosen subregions, and is applicable to any imaging problem where the samples are planar.
A superconducting switch that is capable of translating low-voltage superconducting inputs directly into semiconductor-compatible outputs at kelvin-scale temperatures could provide a superconductor-to-semiconductor logical interface for future quantum and neuromorphic computing architectures.
A manufacturing technology that uses a deformable balloon stamp to pick up pre-fabricated electronic devices and print them onto three-dimensional surfaces can be used to create devices with curvy shapes, including electrically small antennas, hemispherical solar cells and smart contact lenses.
Non-adiabatic spin-transfer torque in antiferromagnetically coupled ferrimagnets acts like a staggered magnetic field and can induce efficient domain wall motion.
Suspended double-layer graphene ribbons with attached silicon proof masses can be used to create transducers for nanoelectromechanical system accelerometers that occupy at least two orders of magnitude smaller die area than conventional state-of-the-art silicon accelerometers.
Nanoscale vacuum channel transistors, which have a vertical surround-gate configuration, can be fabricated on 150 mm silicon carbide wafers using conventional integrated circuit processing technology.
A 1 Mb non-volatile computing-in-memory system, which integrates a resistive memory array with control and readout circuits using an established 65 nm foundry CMOS process, can offer high energy efficiency and low latency for Boolean logic and multiply-and-accumulation operations.